(Last Mod: 10 March 2012 17:10:01 )


There are many textbooks and references available for the Verilog HDL (Hardware Description Language), but to date there don't appear to be any that truly stand out as exceptionally good. One area in which the available texts seem to consistently fall short is in describing the language constructs needed to develop good test benches. There are probably several reasons for this, but a likely contributor is that most of the commercial development tools come with their own testing capabilities, such as graphical waveform editors, and thus relatively few people use the built-in language constructs.

Flipping the same point, namely common tool-specific capabilities, the other way around, most development tools offer graphical editors with which to build block diagrams and/or state machine diagrams from which the tool automatically generates the underlying Verilog code. Furthermore, the tool generally presents the designer with at least a basic set of components and frequently has some fairly sophisticated components, such as ALUs, that can be instantiated and customized without ever seeing the underlying Verilog code. In fact, many "Verilog programmers" seldom, if ever, write or even see any actual Verilog code.

While these "productivity enhancement" features provided by most tools offer true enhancements to productivity and, therefore, can't be readily dismissed by companies that, after all, must always be aware of schedule deadlines as well as the bottom line, they are too often relied upon by beginning Verilog developers, including students taking a Verilog course, whose focus is supposed to be learning Verilog and not how to use a particular vendor's tool suite to do their thinking for them. Hence, the material found here uses only the features of the Verilog language and, as such, may seem a bit primitive to those that have seen the much more sophisticated features available in the vendor tools. But, in addition to learning how to use the intrinsic capabilities of the language, you will also be learning skills and techniques that are portable across tools.

The Basics of Verilog