Homework Assignment #3

DATE ASSIGNED: 04 Feb 03

DATE DUE: 13 Feb 03

Problems 6.(29,32,35,40,41,51)

Notes, Hints and Suggestions:

Problem 6.32

Notice that they say that, other than beta, the transistors are matched. This means that they have the same Early voltage and that they have the same saturation current. But the implication of this is that, since the base-emitter voltages of both transistors are the same, both transistors have to have the same collector current and they'll have slightly different emitter currents (which still must add to the current source output) due to slightly different base currents as a result of the beta mismatch. The important point to note is that if the collector currents are the same, and the collector resistors are well matched, then there is no offset voltage at the output (for common mode input).

But this is clearly not the result that the authors have asked you to show. The authors got a little sloppy with this problem and were not consistent in their definition of I_S for these two transistors compared to how they have defined I_S in the bulk of their work..

Remember that the fundamental relationships, in the active region, between the various currents and the base-emitter voltage are:

i_C = I_SC * exp(v_be/V_T)

i_E = I_SE * exp(v_be/V_T)

i_B = I_SB * exp(v_be/V_T)

such that we have three different saturation currents that we could talk about. However, in the active region, we also have the behavior characterized by:

i_C = beta* i_B    and     i_C = alpha * i_E

And so we can pick one of the three saturation currents above and arbitrarily declare it to be "THE" saturation current, I_S, for that transistor and write the other two in terms of the chosen I_S. The authors chose to use I_SC for this purpose. So saying that the transistors are well matched except for beta (and hence alpha) means that the two transistors have the same I_SC and slightly different I_SE and I_SB and this leads directly to the situation described in the first paragraph above.

But what if, instead, we decide to use I_SE as the I_S for these two transistors? Now we have the situation where the emitter currents would be identical (and hence half of the current source output) and the collector currents would be slightly different. This is what the authors have done - probably without realizing it since they wanted to impose the constraint the the current split evenly between the two transistors and didn't realize that this means that, with I_S defined the way they chose to define it, the I_S for the two transistors had to be slightly different.

In practice, it is virtually never necessary to make this careful a distinction about WHICH saturation current you are saying is matched because the errors that result from being inconsistent on this point are usually small compared to the inherent uncertainly in the actual values even for nominally identical transistors located next to each other on the same piece of silicon. It becomes an issue in this problem only because we are assuming that everything else is perfectly matched and therefore even small discrepancies become the dominant discrepancy. This problem itself actually illustrates the relatively minor impact of this inconsistency when you compare the input offset voltage due to a 10% mismatch in collector resistance with the input offset voltage due to a 33% mismatch in beta (such as one being 100 and the other being 200 where the average is 150).