Exam #3 Review
(Last Modified: 04 November 2010 06:11:47 PM )
Note: While we were unable to cover the cascade and the differential amplifier configurations in class and, therefore, you are not expected to have a detailed understanding of their specific behavior (so you may ignore Question #14 below), the fact remains that they are nothing more than transistor circuits and you should be able to perform the basic analysis steps learned in this chapter on ANY transistor circuit - at least in so far as setting up the small-signal equivalent circuits and the resulting equations necessary to determine the midband gain and the upper and lower cutoff frequencies.
Date of exam: 08 May 03
Topics Covered
This exam will cover Chapter 7 sections 7.1 through 7.8. However, this material builds on prior material and there is no way to divorce it from that prior material. The following topic areas will be the source for questions on the exam. Note that some of them represent basic concepts from prior chapters.
The basic exponential equation that describes the collector current as a function of base-emitter voltage in a BJT - a.k.a. the transistor equation.
The meaning and use of the "alpha" and "beta" coefficients of a transistor.
The meaning and derivation of the BJT transconductance, input resistance, emitter resistance and output resistance.
The two principle small-signal low frequency models for a BJT and the high frequency hybrid-pi model.
Miller's Theorem and its application in breaking the "bridging" element in a circuit to make the analysis easier.
Drawing appropriate small signal circuit diagrams to explore the midband behavior of a circuit.
Drawing appropriate small signal circuit diagrams to explore the low-frequency behavior of a circuit.
Drawing appropriate small signal circuit diagrams to explore the high-frequency behavior of a circuit.
Being able to draw and/or identify circuits that represent each of the three basic single-transistor configurations (CE, CB, CC).
Commenting on the shortcomings and advantages of each of the three basic single-transistor configurations (CE, CB, CC).
Discussing how the Cascode and Cascade configurations overcome these shortcoming.
As with Chapter 6, we have covered a lot of material in this chapter. Not as much as in Chapter 6 but what we have covered is more complex and more abstract. It would probably be very productive, both in preparing you for this exam as well as giving you a concise review sheet for future reference, to spend some time writing a couple of short sentences (or equations or procedural steps as appropriate) for each of the above topic items. Most of the above topic descriptions can be turned into exam questions very easily. Hint. Hint.
Exam Format and Guidelines
The exam will be closed-book and closed note. At least 1/4 of the points on the exam will be from the following problems verbatim. Not all of these problems are trivial and might take quite a bit of time to solve the first time. But if the exam is the first time you are attempting to solve the problem, that will be the result of a choice you made with full knowledge of the potential consequences. In other words, ignore this review sheet at your own risk.
The exam will consist of a number of multiple choice or short answer questions followed by problem solving questions. The focus is on the fundamental concepts and your grasp of them. I am not looking for you to be able to solve complex problems involving lots of algebra within the framework of an hour exam. If you are getting bogged down in a lot of algebra, then take a step back and look for an easier way - because it almost certainly exists. I am looking for you to be able to apply the fundamental concepts to simple problems in a manner that demonstrates that you would know how to proceed if faced with a more formidable circuit. To that end, I give substantial partial credit if you can describe how to go about solving a particular problem - keep this in mind if you are running out of time. Also keep in mind that if you spend all of your time on Question #3 and don't get to Question #4, 5 or 6, that I cannot give partial credit for problems you didn't even attempt. Read through the entire exam and answer those questions you know how to tackle first. Then at least start all of the other problems by drawing the appropriate circuit diagrams and setting up the problem solution.
Unless specifically stated otherwise, assume that all answers are to be supported. This may be in the form of equations and mathematical manipulation or, if appropriate, through a logical line of reasoning. Just writing down a memorized result will not get full or even most of the credit - though certainly it will get considerably more credit than if no answer at all is given.
The chart on page 601 of the text will be reproduced on the exam for your reference. If there are any other equations or items that you would like to see on the reference sheet bring them to class on Tuesday 06 May 03 and we will decide at that time whether they will be on the reference sheet. The basic equations for the transistor parameters (such as gm, re, rpi and so forth) will NOT be placed on the reference sheet. Neither will the relationship between f_t and the device capacitances. To remember this one just remember that in order to determine a frequency you need an RC time constant and w = 2PI*f = 1/(RC). The C is the sum of the two capacitances that characterize a transistor, namely Cpi and Cmu, and the R is the basic resistive transistor parameter - the transconductance (which is 1/resistance). Therefore f_t = gm/(2PI(Cpi+Cmu)). Make the effort to know this relationship on exam day. After that, look it up if necessary.
Basic Analysis Flow
Note on your circuit diagrams. Most errors in the analysis of these circuits come from incorrect manipulation of the circuit schematic. If helpful, redraw the circuit in a form that might be easier for you to work with - such as the ground node being at the bottom, signal sources being on the left, output nodes being on the right, or whatever. Also, take advantage of any places where you can combine series and parallel components and where you can replace portions of the circuit with a Thevenin (or Norton) equivalent circuit. Don't try to do to much manipulation in a single step - it is far better to draw the circuit two or three times making minor changes at each step than to make careless mistakes because you tried to do too much in your head at one time. Also, be careful not to lose information such as combining two series components when you need the node voltage at their juncture.
Review Problems
1) All homework problems. Be sure that you understand the principles behind the solutions for each. Many are of reasonable difficulty for exam questions and you can count on some of the exam problems either being homework problems or being closely related to homework problems. Certainly long homework problems will not be on the exam in their entirety - but portions of them might be.
2) The Review for Exam #1 and Exam #1 itself. If you had difficulty on that exam and have failed to correct the deficiencies identified, do not expect to be able to ignore those deficiencies and somehow do well on Exam #2. Remember, much of the analytical steps performed in Chapter 7 are grounded in Chapter 6 (and earlier chapters). Continuing to neglect those issues is done at your own peril.
Questions 3-9 reference the gain transfer function A(s) = Am * F_L(s) * F_H(s) as it pertains to "appropriate" circuits (i.e., the type we have been working with).
3) For frequencies above the lower cutoff frequency, what is the magnitude of F_L(s)?
4) For frequencies below the upper cutoff frequency, what is the magnitude of F_H(s)?
5) In order for a pole in F_L(s) to be "sufficiently dominant" ("sufficiently" meaning that we can assume that the frequency of the dominant pole is a good estimate of the lower cutoff frequency) what conditions must be met?
6) In order for a pole in F_H(s) to be "sufficiently dominant" ("sufficiently" meaning that we can assume that the frequency of the dominant pole is a good estimate of the upper cutoff frequency) what conditions must be met?
7) What simplifications to the full circuit can (usually) be made in order to investigate the midband gain?
8) What simplifications to the full circuit can (usually) be made in order to investigate the low frequency response?
9) What simplifications to the full circuit can (usually) be made in order to investigate the high frequency response?
10) Draw a basic CE single transistor amplifier driven by a capacitively coupled Thevenin source and driving a capacitively resistive load. Be sure to include any necessary biasing circuitry - do NOT use any current sources for this.
11) Draw a basic CB single transistor amplifier driven by a capacitively coupled Thevenin source and driving a capacitively resistive load. Be sure to include any necessary biasing circuitry - do NOT use any current sources for this.
12) Draw a basic CC single transistor amplifier driven by a capacitively coupled Thevenin source and driving a capacitively resistive load. Be sure to include any necessary biasing circuitry - do NOT use any current sources for this.
13) Draw a basic Cascode two-transistor amplifier driven by a capacitively coupled Thevenin source and driving a capacitively resistive load. Be sure to include any necessary biasing circuitry - do NOT use any current sources for this.
14) Draw a basic Cascade two-transistor amplifier driven by a capacitively coupled Thevenin source and driving a capacitively resistive load. Be sure to include any necessary biasing circuitry - do NOT use any current sources for this.
15) Draw the small signal circuit appropriate for determining the midband gain for each circuit in questions 10-14 above.
16) Draw the small signal circuit appropriate for determining the lower cutoff frequency for each circuit in questions 10-14 above.
17) Draw the small signal circuit appropriate for determining the upper cutoff frequency for each circuit in questions 10-14 above.
18) Given two nodes with a bridging element between them, and given the relationship between the voltages on the two nodes such that V1 = K * V2, SHOW that the bridging element can be replaced with two components where each node has one of these components between it and ground. SHOW what the values of these components must be in terms of the original bridging component's value and the gain K.
19) Describe the Miller Effect and how it can be detrimental to the frequency response of certain amplifier configurations.
20) What are two ways of overcoming the Miller Multiplier effect that dominates the basic CE configuration? In other words, why don't the CB and CC configurations suffer from this phenomenon. Not just "what", but "why/how" do these methods work?